View BD6761FS_2739145.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. motor drivers for printers three-phase brushless motor pre-drivers for paper feed BD6761FS,bd6762fv description this product is the motor predriver for high-side/low-side n-c hannel mos-fet drive, which has the built-in booster (step-up) circuit. BD6761FS uses the drive type controlled by the servo signal input from outside and bd6762fv incorporates a servo circuit (speed discriminator + pll servo). features 1) predriver for high-side/low-side n-channel mos-fet 2) built-in booster (step-up) circuit 3) built-in fg and hysteresis amplifiers 4) built-in current limit circuit 5) built-in thermal shutdown circuit 6) built-in forward/reverse rotation switching circuit (BD6761FS, fd6762fv) 7) built-in short brake circuit (BD6761FS, bd6762fv) 8) built-in low voltage protection circuit (BD6761FS, bd6762fv) 9) built-in speed lock detection circuit (bd6762fv) 10) built-in motor lock protection circuit (bd6762fv) 11) built-in start-stop circuit (bd6762fv) 12) built-in servo circuit (speed discriminator + pll) (bd6762fv) 13) built-in frequency multiplication circuit (bd6762fv) 14) 180, direct pwm drive (BD6761FS) 15) 120, slope switchable direct pwm drive (bd6762fv) applications main motor for paper feed of the laser beam printer and ppc absolute ma ximum ratings (ta=25 ) parameter symbol ratings unit BD6761FS bd6762fv applied voltage vcc 36 36 v applied voltage vg 36 36 v pin input voltage vin vreg vreg v power dissipation pd 950 ( 1) 1100 ( 2) mw operating temperature range t opr -35 ~ +75 -25 ~ +75 storage temperature range t stg -40 ~ +150 -40 ~ +150 junction temperature tjmax 150 150 1 reduced by 7.6 mw/ over 25 , when mounted on a glass epoxy board (70 mm ? 70 mm ? 1.6 mm). 2 reduced by 8.8 mw/ over 25 , when mounted on a glass epoxy board (70 mm ? 70 mm ? 1.6 mm). line up matrix BD6761FS bd6762fv unit power supply voltage (vcc) 16~28 16~28 v drive type 180 120 / 120 slope servo no yes no.10016eat01
BD6761FS,bd6762fv technical note 2/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. electrical characteristics BD6761FS (unless otherwise specified, ta=25c, vcc=24.0v) parameter symbol limits unit conditions min. typ. max. overall circuit current icc 10 15 20 ma vreg voltage vreg 5.5 6 6.5 v ivreg=-1ma hall amp input bias current iha 0.7 3.0 a in-phase input voltage range vhar 1.5 4.1 v input level vinh 30 250 mvpp single-phase hall amplitude pwm high cfe voltage vhpcfe 3.0 3.5 4.0 v low cfe voltage vlpcfe 2.1 2.5 2.9 v cfe oscillating frequency fcfe 12 15 18 khz rfe=50k ? , cfe=1000pf pwm on duty offset dpwm -1.5 0 1.5 % torque amplifier high cpout input current icpouth 0 1 a low cpout input current icpoutl -1 0 a current limit current detection voltage 1 vcl1 0.391 0. 435 0.479 v for current sense amplifier current detection voltage 2 vcl2 0.432 0. 480 0.528 v for current limit comparator vcl2-vcl1 vcl 40 45 50 mv fg amp input bias current ibfg -1 1 a input offset voltage vbfg -10 10 mv high output voltage vhfg 4.5 5.0 vreg v ihfgout=-0.75ma low output voltage vlfg 1.0 1.5 v ilfgout=2ma low fgs output voltage vlfgs 0.1 0.3 v ilfgsout=3ma open loop gain gvfg 45 54 db f=3khz bias voltage vbiasfg 2.7 3.0 3.3 v hysteresis width vhys 100 180 250 mv f/r high input current ifrl 30 60 90 a f/r=6v low input current ifrh -10 0 10 a f/r=0v high input level vihfr 2.2 vreg v reverse rotation low input level vilfr 0 0.8 v forward rotation acc and dec high acc input current iacch 30 60 90 a acc=6v low acc input current iaccl -10 0 10 a acc=0v high dec input current idech 30 60 90 a dec=6v low dec input current idecl -10 0 10 a dec=0v accelerating current iss -260 -200 -140 a rcp=13.5k ? , acc=l decelerating current iso 140 200 260 a rcp=13.5k ? , dec=l high acc input level vihacc 2.2 vreg v low acc input level vilacc 0 0.8 v high dec input level vihdec 2.2 vreg v low dec input level vildec 0 0.8 v high-side output high-side voltage vhg vcc+5 vcc+6 vcc+7 v pull-down resistor rhd 70 100 130 k ? low-side output low-side voltage vlg 9.5 10.5 11.5 v pull-down resistor rld 70 100 130 k ? booster boost voltage vg vcc+5 vcc+6 vcc+7 v cp1 oscillating frequency fcp1 35 62.5 85 khz
BD6761FS,bd6762fv technical note 3/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. bd6762fv (unless otherwise specified, ta=25c, vcc=24v) parameter symbol limits unit conditions min. typ. max. overall circuit current 1 iccs 5.1 7.6 10.2 ma st/sp=open circuit current 2 icc 10 17 25 ma st/sp=gnd vreg voltage vreg 4.5 5 5.5 v ivreg=-1ma low voltage protection level vuvon 9.5 11.5 13.5 v low voltage protection hysteresis level vuvhys 0.4 0.5 0.6 v hall amp input bias current ibh 1 3 a in-phase input voltage range vhar 0 3 v input level vinh 50 mvp-p pwm high cfe voltage vcfeh 2.6 2.9 3.2 v low cfe voltage vcfel 1.2 1.4 1.6 v cfe oscillating frequency fcfe 13 16 19 khz rfe=20k, cfe=1000pf ref voltage vrfe 0.75 0.95 1.15 v fg amp input bias current ifgm -1 1 a input offset voltage vfgof -10 10 mv high output voltage vfgoh 3.5 4.0 v i=-0.5ma low output voltage vfgol 1.0 1.5 v i=0.5ma low fgs output voltage vfgsl 0.1 0.3 v i=2ma open loop gain gfg 45 54 db f=3khz bias voltage vbfg 2.25 2.50 2.75 v hysteresis width vfghys 100 180 250 mv integration amp di clamp voltage 1 vdi1 1.5 2.1 2.7 v intin=0.1ma di clamp voltage 2 vdi2 0.5 0.7 0.9 v intout 0.1ma bias voltage vberr 2.25 2.50 2.75 v intin=intout speed discriminator high output voltage vdoh vreg-0.3 vreg-0.1 v i=-0.1ma low output voltage vdol 0.1 0.3 v i=0.1ma pll high output voltage vpoh vreg-0.45 vreg-0.15 v i=-0.1ma low output voltage vpol 0.15 0.45 v i=0.1ma lock detection low output voltage vldl 0.15 0.3 v i=2ma lock protection clk cycle for protection circuit tlp 13 20 27 msec lp=0.1 f vco clk input frequency range fclk 0.2 2.5 khz designed value (vco alone) high-level clk input voltage vckh 2.2 vreg v low-level clk input voltage vckl 0 0.8 v high-level clk input current ickh -10 10 a low-level clk input current ickl -140 -100 -60 a
BD6761FS,bd6762fv technical note 4/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. bd6762fv (unless otherwise spec ified, ta=25c, vcc=24 v) parameter symbol limits unit conditions min. typ. max. start/stop high-level st/sp input voltage vsth 2.2 vreg v stop low-level st/sp input voltage vstl 0 0.8 v start high-level st/sp input current isth -10 0 10 a low-level st/sp input cu rrent istl -70 -50 -30 a forward rotation/reverse rotation high-level fr input voltage vfrh 2.2 vreg v reverse rotation low-level fr input voltage vfrl 0 0.8 v forward rotation high-level fr input current ifrh -10 0 10 a low-level fr input current ifrl -70 -50 -30 a 120/slope switching high-level 120/slope input voltage vanh 2.2 vreg v 120 low-level 120/slope input voltage vanl 0 0.8 v 120 slope high-level 120/slope input current ianh -10 0 10 a low-level 120/slope input current ianl -70 -50 -30 a short brake high-level sb input voltage vsbh 2.2 vreg v short brake operation low-level sb input voltage vsbl 0 0.8 v short brake clear high-level sb input current isbh -10 0 10 a low-level sb input current isbl -70 -50 -30 a current limit current detection voltage vcl 0.23 0.26 0.29 v booster cp1 oscillating frequency fcp1 75 125 175 khz vg step-up voltage vg v cc+5.7 vcc+6.7 vcc+7.7 v high-side output high output voltage 1 vhhg1 vcc+ 5.8 vcc+6.8 vcc+7.8 v vg=31v high output voltage 2 vhhg2 vcc+ 3.8 vcc+4.8 vcc+5.8 v io=-1ma low output voltage 1 vhlg1 0.1 0.3 v low output voltage 2 vhlg2 0.5 1.0 v io=5ma clamp voltage vhcl 10 11 12 v low-side output high output voltage 1 vlhg1 9.8 10.8 11.8 v high output voltage 2 vlhg2 9.0 10.0 11.0 v io=-5ma low output voltage 1 vllg1 0.1 0.3 v low output voltage 2 vllg2 0.3 0.5 v io=5ma
BD6761FS,bd6762fv technical note 5/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. reference data power dissipation reduction 0 200 400 600 800 1000 1200 0 25 50 75 100 125 150 ambient temperature: ta( ) power dissipation : pd mw) 950 0 200 400 600 800 1000 1200 0 25 50 75 100 125 150 ambient temperature: ta( ) power dissipation : pd mw) 1100 fig.7 BD6761FS power dissipation reduction reduced by 7.6 mw/c over 25c, when mounted on a glass epoxy board (70 mm ? 70 mm ? 1.6 mm). fig.8 bd6762fv power dissipation reduction reduced by 8.8 mw/c over 25c, when mounted on a glass epoxy board (70 mm ? 70 mm ? 1.6 mm)/ Xp 0 5 10 15 20 25 16 21 26 31 36 supply voltag e :vcc[v] icc[ma] 5.0 5.5 6.0 6.5 7.0 0 2.5 5 7.5 10 vreg current : ivreg[ma] vreg[v] 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 012345 vg current : ivg[ma] vg[v] 0 5 10 15 20 25 16 21 26 31 36 supply voltag e :vcc[v] icc[ma] 4.0 4.5 5.0 5.5 6.0 0 2.5 5 7.5 10 vreg current : ivreg[ma] vreg[v] 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 012345 vg current : ivg[ma] vg[v] 25 -35 75 fig.1 circuit current (BD6761FS) fig. 2 vreg voltage (BD6761FS) 25 -35 75 fig. 3 vg voltage (BD6761FS) 75 25 -35 25 -25 75 fig.4 circuit current (bd6762fv) fig.5 vreg voltage (bd6762fv) 25 -25 75 fig.6 vg voltage (bd6762fv) 75 25 -25
BD6761FS,bd6762fv technical note 6/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. block diagram, application circuit diagram, and pin function 1)BD6761FS fig.9 BD6761FS block diagram BD6761FS pin function no. pin name function no. pin name function 1 gnd gnd pin 17 rfe cfe current control pin 2 cp1 cp1 pin 18 cfe pwm frequency control pin 3 uhg u-phase high-side fet gate pin 19 cnf phase compensation pin 4 ulg u-phase low-side fet gate pin 20 f/r forward/reverse rotation switching pin 5 vhg v-phase high-side fet gate pin 21 dec deceleration signal input pin 6 vlg v-phase low-side fet gate pin 22 acc acceleration signal input pin 7 whg w-phase high-side fet gate pin 23 rcp cpout current control pin 8 wlg w-phase low-side fet gate pin 24 cpout charge pump output / torque control signal input pin 9 cl motor current detection pin 10 ph peak hold pin 25 vreg vreg pin 11 hu+ hall signal input pin 26 fgin+ fg input + pin 12 hu- hall signal input pin 27 fgin- fg input - pin 13 hv+ hall signal input pin 28 fgout fg output pin 14 hv- hall signal input pin 29 fgsout fgs output pin 15 hw+ hall signal input pin 30 vcc vcc pin 16 hw- hall signal input pin 31 vg boost pin 32 cp2 cp2 pin ? ? rnf r2 fgin- cpout acc dec f/r gnd cp1 uhg ulg vhg vlg whg wlg cl ph hall amp booster charge pump pre drive mos fet mos fet mos fet hu+ hu- hv+ hv- hw+ hw- vg vcc fgout rcp cnf cfe rfe fgsout fgin+ vreg traiangle wave generator cp2 logic peak hold short brake slew rate detect hw hv hu tsd regurator 10.5v regurator 10.5v uvlo edge detect current limit s r q q current sense amp vcl1 torque amp outputoff comp vcl2 1pin 32pin 16pin 17pin m 0.12 ? 1k 200? (200? ~ 1k ? ) 50k ? (50k ? ~ 100k ? ) r3 100k ? r1 200 ? (200? ~ 1k ? ) 1k ? r1 820? 10k ? (1k ? ~ 100k ? ) r2 82k ? 0.1f 0.1f 0.1f 470pf 0.033f (0.01f ~ 0.1f) 0.01f 0.01f 0.01f 1000pf (500pf ~ 2000pf) 0.1f 0.33f 0.1f (0.01f~0.1f) 0.022 0.22f c1 0.47f c2 1500pf 10f 0.1f 0.01f (0.01f ~ 0.1f) 470pf 470pf capacitor, diode for the protection between the output fet drain and source see p. 18/22. resistor for setting the current limit see p. 18/22. cl voltage smoothing low pass filter see p. 18/22. capacitor for hall noise elimination see p. 18/22. 100k ? capacitor for setting vg current capacity see p. 18/22. resistor for setting fg amplifier gain and the capacitor for the filter see p. 18/22. for setting hall input level see p. 18/22. capacitor for preventing vreg oscillation see p. 18/22. capacitor for setting the phase compensation see p. 19/22. external constant for setting pwm frequency see p. 18/22. mos fet capacitor for setting the peak hold see p. 19/22. capacitor, resistor for setting the charge pump see p. 19/22. fgsout pull-up resistor see p. 20/22. ? output fet gate voltage stabilization resistor see p.19/22. ? ? c4 c3 capacitor for vcc pin noise elimination see p. 19/22. ?
BD6761FS,bd6762fv technical note 7/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. 2)bd6762fv fig.10 bd6762fv block diagram bd6762fv pin function no. pin name function no. pin name function 1 gnd gnd pin 21 st/sp start/stop pin 2 rf motor current detection pin 22 fr forward/reverse rotation switching pin 3 uhg u-phase high-side fet gat e pin 23 sb short brake pin 4 u protection pin for u-phase high-side fet gs breakdown voltage 24 120/sl 120/slope switching pin 5 ulg u-phase low-side fet gate pin 25 fgin+ fg amplifier input + pin 6 vhg v-phase high-side fet gate pin 26 fgin- fg amplifier input - pin 7 v protection pin for v-phase high-side fet gs breakdown voltage 27 fgout fg amplifier output pin 8 vlg v-phase low-side fet gate pin 28 fgsout fgs output pin 9 whg w-phase high-side fet gate pin 29 clkin reference clk input pin 10 w protection pin for w-phase high side fet gs breakdown voltage 30 lpf vco system loop filter connection pin 11 wlg w-phase low-side fet gate pin 31 pout pll output pin 12 vreg internal power supply 5 v output pin 32 dout speed discriminator output pin 13 cfe pwm frequency control pin 33 intin integration amplifier input pin 14 rfe cef charge/discharge current control pin 34 intout integration amplifier output pin 15 hu+ hall signal input pin 35 lp motor lock protection time setting pin 16 hu- hall signal input pin 36 ld motor rotation number lock detection pin 17 hv+ hall signal input pin 37 vcc vcc pin 18 hv- hall signal input pin 38 vg step-up voltage output pin 19 hw+ hall signal input pin 39 cp2 capacitor connection pin (to cp1) 20 hw- hall signal input pin 40 cp1 capacitor connection pin (to cp2) 2k (1k ? ~ 5k ? ) 1k ? ~ 100k ? r1 1k ? ~ 100k ? 0.1f c9 0.33f 5k (2k ? ~ 10k ? ) r2 booster st/sp fr fgin+ fgin- fgout intout vg vcc lp cp2 gnd uhg ulg vhg vlg whg wlg cfe rfe hw+ hw- m v u w dout intin hv+ hv- sb 120/sl clkin lpf pout ld mos fet vco fgsout cp1 rf hu+ hu- pre driver velocity discriminator regurator divider vco phase comparison pll hall comp lp ld clk oscillator dac3 470pf 1k ? (0.01f~0.1f) 0.1f 1000pf (500pf ~ 2000pf) 20k (20k ? ~ 100k ? ) 0.01f 0.1f 0.1 ? 0.01f (0.01f ~ 0.1f) 10f c7 0.22f (0.1f ~ 1f) r6 220k ? c5 0.047f c6 0.47f r5 1m ? r4 20k ? c8 0.33f r7 2k ? 150pf 390k ? 4.7k ? 0.1f 1f vreg logic triangular oscillator mos fet vco mos fet vco 0.1f 0.1f 0.01f 0.01f hu hv hw vcc 10k ? 10k ? capacitor for the protection between the output fet drain and source see p. 18/22. resistor for setting the current limit see p. 18/22. rf voltage smoothing low pass filter see p. 18/22. capacitor for preventing vreg oscillation see p. 18/22. pwm frequency external constant see p. 18/22. capacitor for hall noise elimination see p. 18/22. capacitor for setting vg current capacity see p. 18/22. resistor for setting fg amplifier gain and the capacitor for the filter see p. 18/22. ? rnf r1 c1 r2 c2 ? speed lock detection pull-up resistor capacitor for the motor lock detection time see p. 19/22. integration amplifier external constant see p. 19/22. fgsout pull-up resistor mos fet output fet gate voltage stabilization resistor see p. 19/22. for setting hall input level see p. 18/22. for setting hall input level see p. 18/22. lpf external constant see p. 19/22. ? capacitor for vcc pin noise elimination see p. 19/22. ? ? ? ?
BD6761FS,bd6762fv technical note 8/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. i/o logic 1)BD6761FS forward rotation (f/r=low) input conditions output state pin no. 15 17 19 3 5 7 4 6 8 hu+ hv+ hw+ uhg vhg whg ulg vlg wlg condition 1 l m h h h l l l h condition 2 l h h h pwm l l pwm h condition 3 l h m h l l l h h condition 4 l h l h l pwm l h pwm condition 5 m h l h l h l h l condition 6 h h l pwm l h pwm h l condition 7 h m l l l h h h l condition 8 h l l l pwm h h pwm l condition 9 h l m l h h h l l condition 10 h l h l h pwm h l pwm condition 11 m l h l h l h l h condition 12 l l h pwm h l pwm l h reverse rotation (f/r=high) input conditions output state pin no. 15 17 19 3 5 7 4 6 8 hu+ hv+ hw+ uhg vhg whg ulg vlg wlg condition 1 l m h l l h h h l condition 2 l h h l pwm h h pwm l condition 3 l h m l h h h l l condition 4 l h l l h pwm h l pwm condition 5 m h l l h l h l h condition 6 h h l pwm h l pwm l h condition 7 h m l h h l l l h condition 8 h l l h pwm l l pwm h condition 9 h l m h l l l h h condition 10 h l h h l pwm l h pwm condition 11 m l h h l h l h l condition 12 l l h pwm l h pwm h l input conditions output criteria hall input voltage high-side fet gate voltage h: 3.05v l Q 1v, vg-1v Qh m: 3.0v low-side fet gate voltage l: 2.95v l Q 1v, 9 vQh
BD6761FS,bd6762fv technical note 9/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. acc, dec input conditions output state pin no. 21 22 24 short brake dec acc cpout condition 1 h h open off condition 2 h l h off condition 3 l h l off condition 4 l l l on input conditions acc, dec input conditions h 2.2v l 0.8v output criteria cpout rcp=13.5k ? , cpout=3v high: current outflow more than 140 a from cpout pin low: current inflow more than 140 a to cpout pin open: cpout pin current -10 aQicpout Q10 a short brake function on state high-side fet gate voltage Q 1v low-side fet gate voltage R 9v
BD6761FS,bd6762fv technical note 10/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. 2)bd6762fv forward rotation (f/r=low), 120 (120/sl=high) input conditions output state high-side gate low-side gate output pin no. 15 17 19 3 6 9 5 8 11 4 7 10 hu+ hv+ hw+ uhg vhg whg ulg vlg wlg u v w condition 1 l l h l h l l l h m h l condition 2 h l h l h l h l l l h m condition 3 h l l l l h h l l l m h condition 4 h h l l l h l h l m l h condition 5 l h l h l l l h l h l m condition 6 l h h h l l l l h h m l reverse rotation (f/r=high), 120 (120/sl=high) input condition output state high-side gate low-side gate output pin no. 15 17 19 3 6 9 5 8 11 4 7 10 hu+ hv+ hw+ uhg vhg whg ulg vlg wlg u v w condition 1 l l h l l h l h l m l h condition 2 h l h h l l l h l h l m condition 3 h l l h l l l l h h m l condition 4 h h l l h l l l h m h l condition 5 l h l l h l h l l l h m condition 6 l h h l l h h l l l m h st/sp mode open or high standby l operating mode input condition hall input voltage h 2.0v m 1.5v l 1.0v hu-, hv-, hw- m output criteria high-side fet gate voltage : l Q output (u, v, w) + 1v, vg - 1v Q h low-side fet gate voltage : l Q 1v, 9v Q h
BD6761FS,bd6762fv technical note 11/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. timing chart 1) BD6761FS fig.11 BD6761FS i/o timing chart sinu, sinv, and sinw are the internal ic si gnals synthesized by the hall amplifier. 2) bd6762fv fig.12 bd6762fv i/o timing chart uh ul vh vl wh wl 120 120 slope hu+ hu- hv- hv+ hw- hw+ uh ul vh vl wh wl triangular waveform amplitude hu+ hu- hv+ hv- hw- hw+ sinv forward rotation uhg ulg vhg vlg whg ulg vhg vlg whg wlg sinu sinw wlg reverse rotation uhg hall signal hall signal
BD6761FS,bd6762fv technical note 12/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. i/o circuit diagram 1) BD6761FS high-side gate low-side gate hall input booster cfe pin cpout pin rcp, rfe pins acc, dec, fr pins peak hold current sense amplifier current limit fg amplifier input fg amplifier output fgsout pin vreg 8.5v cp1 (pin2) vg (pin31) (pin32) cp2 vcc 30? vcc 44k ? 16k ? rfe (pin17) 30? vreg vcc vg 100k ? vg uhg (pin3) vhg (pin5) whg (pin7) vreg 10.5v 100k ? vcc ulg (pin4) vlg (pin6) wlg (pin8) 200 ? 200 ? vcc ph (pin10) cl (pin9) 5k ? vcc 5k ? 12k ? 30? 5k ? vcc vref cnf (pin32) ph (pin10) 5k ? 5k ? vcc ph (pin10) vref 200? fgin- (pin27) fgin+ (pin26) 200 ? vreg vcc 25k ? 25k ? vcc fgsout (pin29) vcc cpout (pin24) vreg vcc 5k ? 1 1k ? 1k ? 5k ? 33k ? 26k ? rcp (pin23) 30? vreg vcc 30? vcc 3.1k ? fgout (pin28) 30? 100k ? 5k ? dec (pin21) a cc (pin22) vcc f/r (pin20) vreg cfe (pin18) vcc 30? vreg vreg vcc hu+ (pin11) hv+ (pin13) hw+ (pin15) hu- (pin12) hv- (pin14) hw- (pin16) vcc 5k ? 5k ? 2k ? 2k ?
BD6761FS,bd6762fv technical note 13/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. 2)bd6762fv rf pin uhg, vhg, whg, u, v, w pins ulg, vlg, wlg pins cfe pin rfe pin st/sp, fr, sb, 120/sl hu+, hv+, hw+, hu-, hv-, hw- pins fgin+, fgin- pins clkin fgin+, fgout pins fgsout pin lpf pin pout, dout pins vreg vreg rfe (pin14) vcc 41k ? 9k ? 5k ? 5k ? 30? cfe (pin13) 5k ? 5k ? 5k ? 5k ? 5k ? 30? vcc 100k ? vcc 5v 100 k 5k st/sp(pin21) fr(pin22) sb(pin23) 120/sl(pin24) fgsout (pin28) 20k ? vreg 5v pout(pin31) dout(pin32) vcc 30? 30? 5v 30? 30? 1k ? vcc lpf (pin30) 1k ? vcc rf (pin2) vg vg 14k ? 70k ? 80? uhg, vhg, whg (pin3, 6, 9) u, v, w (pin4, 7, 10) vg 1k ? vcc 5k ? vreg hu-(pin16) hv-(pin18) hw-(pin20) vcc 5k ? hu+(pin15) hv+(pin17) hw+(pin19) vreg vreg vcc 200 vreg vcc 200? fgin+ (pin25) vreg vreg fgin- (pin26) vcc u l g, v l g, w l g (pin5, 8, 11) 10.5v 2.84k ? 30? 30? 5k ? 5k ? 5k ? 200 ? fgout (pin27) vreg vcc 15k ? 15k ? 200? vcc fgin+ (pin25) vcc 5 v clkin (pin29) 50k ? 5k ?
BD6761FS,bd6762fv technical note 14/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. intin pin intout pin lp pin ld pin vg, cp2, cp1 pins lp (pin35) vreg 5k ? 5k ? 5k ? 5k ? 5k ? 90? vcc ld(pin36) 5v 100k ? cp2 (pin39) vcc vg (pin38) 30? intin (pin33) vcc 1k ? intout vreg vre g 90? 90? intout (pin34) intin vreg vreg vreg 5k ? vreg 1k ? 1k ? vcc vcc 8.5v 30? cp1 (pin40)
BD6761FS,bd6762fv technical note 15/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. ic operation 1) hall input and output for the hall input signal, the wave is shaped by the hall amplifier to generate the drive signal. this drive signal is amplified in the predriver block and the gate voltage is output for n-channel mos fet. 2) pwm operation pwm oscillating frequency is determined by the triangular wa veform frequency which is decided by the external constant. this triangular waveform voltage and the listed voltage in the following chart are compared to perform pwm drive. rfe, rfe cfe, cfe cfe, cfe pin charge/discharge current i frequency (typ.) comparison voltage BD6761FS 50k ? 1000pf 1.6v/r 16.5khz drive signal shaped by the hall amplifier bd6762fv 20k ? 1000pf vrfe/r 16khz integration amplifier output pin voltage 3) booster circuit (step-up circuit) (common) BD6761FS (frequency = 62.5 khz) and bd6762fv (frequency = 125 khz) generate the triangular waveform when the internal oscillator generates free-run oscillation and the re ctangular waveform is generated at cp1. when a capacitor is connected between cp1 and cp2, and vg and gnd, the step-up voltage is generated at vg pin. in this case, set vcc so that vg does not exceed the absolute maximum ratings (36 v). triangular waveform oscillating frequency charge pump voltage (vg pin voltage) BD6761FS 62.5 khz vcc+6v bd6762fv 125 khz vcc+6.7v 4) fg amplifier (common) set the fg amplifier gain so that the fgout pin is within the range of high and low output voltage and the amplitude is higher than the hysteresis width (250 mv: max) of the hys amplifier. fgsout pin uses an open collector format. us e in the condition as it is pulled up to the power supply with the resistor. at this time, pay attention so that the voltage higher than 36 v is not applied to the fgsout pin. 5) acc, dec circuits (BD6761FS) when a resistor is connected to the rcp pin and the low voltage is input to the a cc pin, the current flows out from the cpout pin. when the low signal is input to the dec pin, t he current flows in to the cpout pin. furthermore, when the acc pin and dec pin both set to low, the current flows in to the cpout pin. this current can be converted to the voltage by connecting a filter between the cpout and gnd pins. the voltage generated at the cpout pin controls the pwm's on-duty and maintain s the constant motor rotation by inputting the controlled signal to acc and dec pins. 6) current limit operation when the cl voltage (BD6761FS) and rf voltage (bd6762fv) bec ome the current limit voltage, the current limit circuit operates and works to limit pwm on_dutty. it also turns off the current limit circuit (current limit clear) at the peak of pwm triangular waveform and makes the current flow again. output current iomax at this time are shown in the table. current limit current ba6761fs iomax=0.48/rnf [a] ba6762fv iomax=0.26/rnf [a]
BD6761FS,bd6762fv technical note 16/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. 7) output simultaneous on prevention circuit (BD6761FS, bd6762fv) when the low-side gate voltage becomes high while the high-side gate voltage is low, or when the high-side gate voltage becomes high while the low-side gate voltage is low, the simultaneous on prevention time is provided with t=3.2 ? s (typ value). when the input capacity of external fet is c and the gate connection resistor is r, set r to satisfy the following equation so that the simultaneous on prevention time as mentioned above is not exceeded. check that the simultaneous on is not made in the actual operation and then set c and r. fig.13 high/low-side simultaneous on prevention timing chart 8) short brake (BD6761FS and bd6762fv) BD6761FS operates the short brake action with the acc and dec pi ns set to low, and bd6762fv does with the sb pin set to open or high. at the time of short brake, the high-side gate is turned off and the low-side is turned on. at the time of short brake operating, the current flows to the output fet, which is decided by the motor's counter electromotive voltage and coil impedance. since this current flows via path which does not run through the overcurrent protec tion (current limit) detection resistor, the overcurrent protection does not operate as ic oper ating. therefore, the current more than the overcurrent protection set current may flow to the output fet, pay a ttention so that it does not exceed the output fet rating. 9) forward/reverse rotation circuit (BD6761FS and bd6762fv) forward /reverse rotation of motor can be switched according to the fr pin input conditio ns. logics of the hall input and output conditions according to the fr pin input condit ions are shown in the i/o conditions table (p.10). if the fr pin is switched during the motor rotation, since the simultaneous on prevention circuit in ic operates, the feed through current does not flow. however, since the motor current flows in the di rection to the power source due to the electromotive force, the voltage may be raised if the power source does not have the power supply voltage absorption ability. examine the capacitor characteristics between the power supply and grou nd sufficiently and then pay attention so that the power supply voltage and step-up voltage do not exceed the ab solute maximum ratings. when the physical measures are taken such as increasing the capacitor value which is co nnected between the power supply and ground, check the characteristics enough prior to use. 10) start/stop circuit (bd6762fv) when the st/sp pin is in the sate of o pen or high, ic becomes standby. in the case of standby, some circuits operation are turned off to reduce the current consumption. when the st/sp pin is in the state of low, ic becomes operating. 11) low voltage protection circuit (BD6761FS and bd6762fv) this ic builds in the low voltage protection circuit. when vcc becomes lower than 11.5 v (typ.), the high-side and low-side gates are both turned off to make the coil turn off. prot ection off voltage is 12.0 v (typ.) and hysteresis width is 0.5 v (typ.).since the motor locking pr otection detection circuit operates in bd 6762fv during the low voltage protection operation, if the low voltage protection operating time becomes longer than the motor locking protection detection time, the operation moves to the motor locking protection oper ation after the low voltage protection operation. 12) built-in 120 slope pwm logic (bd6762fv) it is possible to perform 120 drive by setting 120/sl pin to o pen or making high. 120 slope drive is possible by setting the 120/sl pin to open or making high. low noise design is realized by reducing the el ectromagnetic sound generated at the time of phase switching by means of gradually changing the output pwm on-duty during 120 slope energization. however, at the time of startup or t he hall input frequency is lower than about 3 hz (typ. value), it becomes 120 drive. when the hall input frequency is more than about 3 hz (typ. value) and the rise of hall u-phase is detected 7 times, it switches to the 120 slope drive. high-side gate low-side gate t t t t t t 10 ( 24 + r ) 1.8 Q c
BD6761FS,bd6762fv technical note 17/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. 13) servo circuit (bd6762fv) ? frequency multiplication circuit (dividing period) (bd6762fv) this ic builds in the frequency multiplication circuit. servo circuit is composed of the feedback loop as shown in the diagram and flows in/out the current (22 a: typ.) to the lpf pin (30 pin) by detecting the phase difference between the clkin pin (29 pin) and the frequency dividing unit output fcomp. the phase difference signal output to the lpf pi n (30 pin) is smoothed by t he filter which is connected at the ic external of the lpf pin (30 pi n) and this voltage is input to the vco (voltage control oscillation circuit) to decide the frequency for the internal signal fvco. since the di viding ratio of this frequency dividing unit is set to 1024, the relation of fvco[hz]=1024 ?fcomp[hz] can be obtained, and the fcomp and clkin have the same frequency according to the feedback loop as shown in the following diagram, therefore the mult iplied frequency of 1024 times of fcomp or clkin is acquired as the fvco frequency. ? speed discriminator (bd6762fv) the fgsout signal (28 pin) which detects the motor rotati on speed and the reference clock in ic are compared and the acceleration/deceleration signal is output to the dout pin (32 pin). reference clock is the signal (fvco) that the clkin signal (29 pin) is multiplied by 1024. when the fg peri od is short to the reference clock period, it is determined that the motor revolution speed is too fa st and the difference from the reference clock period is output to the dout pin as the deceleration command. when the fg period is long, the difference is output as an accelerating command. ? pll (bd6762fv) phases of the fgsout (28 pin) signal which detected the motor revolution speed and the clkin (29 pin) input from the external are compared, and if the fg phase leads to clkin (28 pin), the difference is output as the deceleration command. if the fg phase lags, the difference is output as the acceleration command. ? integration amplifier (bd6762fv) speed error of the reference clock which is obtained in t he speed discriminator block and the fg signal, and the phase difference signal of the clkin acquired in pll bl ock and the fg are integrated together and smoothed to become the dc voltage. this smoothed signal determines the pwm on-duty. 14) speed lock detection circuit (bd6762fv) when the motor speed is within ? 6.25% range to the clkin signal (29 pin), l is output to the ld pin (36 pin) output. since the ld pin (36 pin) has the open/dr ain output format, use as it is pulled up to the power supply with the resistor (100k ). at this time, pay attention so that the volt age more than 36 v is not applied to the ld pin. 15) motor locking protection (bd6762fv) motor locking protection circuit judges he motor is in the lo cking condition when the motor speed is not in the lock range (preset value: ? 6.25%) and the motor locking detection time t lp elapsed, the high-side and low-side output gates are both turned off.motor locking protection can be cleared by making the condition low after setting the st/sp pin or the sb pin to open or making high. motor locking detection time t lp is determined by the capacitor c7 which is connected to the lp pin and the count number clp (p reset value: 96) of the internal counter. t lp =210 5 c7clp [s] ph ase compara t o r vco (voltage control oscillation circuit ) frequency dividing unit ( 1024 dividin g) clkin fcomp fvco lpf
BD6761FS,bd6762fv technical note 18/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. selecting application components design method design example output fet this ic is the predriver for high-side and low-side n-channel mos fet drive. select the fe t with the required current capacity to drive the motor. recommended fet rds035l03 (a) diodes (bd67861fs) diodes are required to protect between the gate and source of output fet. recommended diode 1ss355 insert the diode in the direction from high-side fet source to the gate side (in the forward direction). protection capacitor between the output fet drain and source check the operation so that the voltage between the output fet drain and source does not exceed the absolute maximum ratings due to the fluctuation of vcc at the time of pwm driving and then set the value. a value of 0.01 to 0.1 f is recommended. a value of 0.1 f is appropriate for the capacitance. insert the capacitor between the output fet drain and source. (position at the close point to fet as much as possible.) vb current capacitance capacitor current capacity from vg changes according to the capacitance to be connected. however, if the capacitance is too large, the following action is delayed when vcc starts up, and the magnitude relation becomes vcc > vg which should be vcc < vg usually and the large current may flow in internal block circuits and result in damaging the circuits. when vg is directly supplied from the external block without using the internal circuits, disconnect the capacitor between cp1 and cp2, and connect the 20k ? resistor (for noise reduction) between cp1 and ground to use. a value of 0.01 f is appropriate for the capacitor between cp1 and cp2 (a value of 0.01 f 0.1 f is recommended.) a value of 0.1 f is appropriate for the capacitor between vg and vcc. pwm frequency pwm frequency can be adjusted by the capacitance and resistance to connect. when the frequency is high, the heat generation increases due to swit ching loss. when the frequency is low, it enters audible range. check the operation with the actual product and determine the constant. the following constants are appropriate. BD6761FS cfe=1000pf, rfe=50k ? , fo=16.5khz(typ.) bd6762fv cfe=1000pf, rfe=20k ? , fo=16.0khz(typ.) hall input level the current value to feed to the hall element changes by changing the resistance and the amplitude level of hall element can be adjusted. amplitude level increases when the resistance value is chosen smaller by considering the noise affect, but pay attention also to the hall input voltage range. BD6761FS (1.5v to 4.1v) and bd6762fv (0v to 3v) connect to the transistor base via 1k ? resistor (base current limit) from the vreg pin. connect the transistor collector to vcc, the emitter to the hall element via r1. connect the ground side of hall element to the ground via r2. a value of 200 ? to 1k ? is recommended. a value of 200? is appropriate, respectively. when connecting to the vcc side directly wi th r1, values of r1=5k ? and r2=2k ? are appropriate. vreg vreg which is the internal volt age output pin drives the circuits in ic. connect the capacitor to stabilize it. a value of 0.01 f to 0.1 f is recommended. a value of 0.1 is appropriate. current limit the current flowing to fet can be controlled by setting the resistance value. determine the constant according to the motor specifications. following equation shows the current value. BD6761FS iomax=0.48/rnf [a] bd6762fv iomax=0.26/rnf [a] hall input noise insert capacitors between the hall phases in order to eliminate the hall input noise due to the effect by the pattern routing design. a value of 0.01 f is appropriate for the capacitor to be installed between the hall phases. a value of 0.01 f to 0.1 f is recommended. cl (rf) voltage smoothing low pass filter smooth the cl (rf) voltage which has pwm noise through the low pass filter. a value of c = 470pf and r=1k ? is appropriate for the low pass filter. for the external constant, since the impedance is high, make sure to design the patte rn with the shortest circuit route so that the circuit is hard to be affected by noise. ? fg amp constant setting fg amp gain: gfg is the ratio of r1 and r2 calculated by the following equation. gfg=20log r2/r1 [db] set up the gain so that the fgou t amplitude is large enough to the hysteresis level of the hyst eresis comparator and it cannot be clamped by the high and low output voltages (vfgoh and vfgol). r1 and c1 form a high pass filter and r2 and c2 form a low pass filter. each cut off frequency; fmpf and flpf is determined by the following equation. fmpf=1/2 r1c1, flpf=1/2 r2c2 set the value so that the ma in signal from pg by the motor is not attenuated but the unnecessary noise can be attenuated.
BD6761FS,bd6762fv technical note 19/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. design method design example ? phase compensation capacitor (BD6761FS) phase compensation is perform ed in the output of the cs amplifier. the capacitance value should be selected according to the servo constant, and proper motor operation should be confirmed. when the capacitanc e is large, the i/o response becomes bad. when it is smal l, the output becomes easy to oscillate. a value of 0.001 f to 0.1 f is recommended. a value of 0.001 f is appropriate for ba6680fs. a value of 0.1 f is appropriate for BD6761FS. ? vcc pin set up the capacitance for the stabilization and noise reduction on the power line. a value of value 1 f to 10 f is recommended. a value of 10 f is appropriate. ? charge pump filter(BD6761FS) filter composed of c3, c4 and r3 smoothes the current pulses output from the cpout pin and converts it to dc. this impedance z is shown by the following equation. when the pole frequency is set to fp1 and fp2, they are: fp1= 1 /2 =1/2 (c3//c4)r3 fp2= 2 /2 =1/2 c4r3 recommended value c3: 0.01 f to 0.1 f; a value of 0.01 f is appropriate. c4: 0.033 f to 0.33 f; a value of 0.1 f is appropriate. r3 : 30k ? to 300k ? ; a value of 100k ? is appropriate. ? output fet gate voltage stabilization resistor when the noise is generated at the time of external mosfet on/off due to the rise and fall s peed of the ic output, insert the resistor between the ic output and external mosfet gate. establish r so that the simultaneous on prevention time is not exceeded as shown in 7). output simultaneous on prevention circuit in p.17/24 operating explanation. a value of r = 0 ? is appropriate. ? peak hold setting capacitor (BD6761FS) charges the peak hold on the vo ltage at the current detection pin cl. a value of 0.33 f is appropriate. ? motor locking detection time setting capacitor (bd6762fv) motor locking detection time t lp is determined by the capacitor c7 which is connected to the lp pin and the count number clp (preset value: 96) of the internal counter. the t lp is shown by the following equation. tlp=210 5 c796 a value of 0.22 f is appropriate. ? integration amplifier constant setting (bd6762fv) speed discriminator side current value id is shown by|i d |=2.5/r4 and the pll side current value ip is shown by|i p |=2.5/r5. therefore, the current i in which flows in the integration amp input pin intin is shown by i in =i d +i p. the larger the i in is, the higher the integration amplifier gain becomes. gains of the speed discriminator and pll can be set by adjusting r4 and r5. gain g is shown by the following equation. when the pole frequency is set to fp1 and fp2, they are: fp1= 1 /2 =1/2 (c5//c6)r6 fp2= 2 /2 =1/2 c6r6 recommended value r4: 10k? to 40k ? ; a value of 20 k ? is appropriate. r5: 300k? to 3m ? ; a value of 1 m ? is appropriate. r6: 100k? to 500k ? ; a value of 220 k ? is appropriate. c5: 0.01 f to 0.1 f; a value of 0.047 f is appropriate. c6: 0.033 f to 1.0 f; a value of 0.47 f is appropriate. ? lpf external constant (bd6762fv) filter composed of c8, c9 and r7 smoothes the current pulses output from the lpf pin and converts it to dc. this impedance z is shown by the following equation. when the pole frequency is set to fp1 and fp2, they are: fp1= 1 /2 =1/2 (c8//c9)r7 fp2= 2 /2 =1/2 c9r7 recommended value c8: 0.1 f to 0.6 f; a value of 0.33 f is appropriate. c9: 0.1 f to 0.6 f; a value of 0.33 f is appropriate. r7: 0.5k? to 10k ? ; a value of 2k ? is appropriate. setting values in these materials are only for reference. actual set may change its ch aracteristics due to the boards layout, w iring and components type to use. please perform the sufficient verification us ing the actual product for the field operation. g = c6 c5+c6 s+ 2 s 1 s 1+ r6 r4 // r5 z = r3 c 4 c3+c4 s+ 2 s 1 s 1+ z = r7 c9 c8+c9 s+ 2 s 1 s 1+
BD6761FS,bd6762fv technical note 20/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. notes for use (1) absolute maximum ratings this product is subject to a strict quality management regime during its manufacture. use of the ic in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in ic damage. assumptions should not be made regarding the state of the ic (short mode or open mode) when such damage is suffered. a physical safety measure such as a fuse should be implemented when use of the ic in a special mode where the absolute maximum ratings may be exceeded is anticipated. (2) connecting the power supply connector backward connecting the power supply connector backwards may result in damage to the ic. for the protection of the ic from reversed connections, provide an appropriate measure, such as the insertion of an external diode each between the power supply and the power supply pin of the ic and between the motor coils. (3) power supply lines the regenerated current resulting from the back emf of the motor will return. ther efore, take an appropriate measure, such as the insertion of a capacitor between the power suppl y and gnd. determine the capacitance in full consideration of all the characteristics of t he electrolytic capacitor, because the electrol ytic capacitor may loose some capacitance at low temperatures. if the connected power supply does not have sufficient current absor ption capacity, regenerative current will cause the voltage on the power supply line to rise, which combined with the product and its peripheral circuitry may exceed the absolute maximum ratings. it is reco mmended to implement a physical safety measure such as the insertion of a voltage clamp diode between the power supply and gnd pins. (4) gnd potential ensure a minimum gnd pin potentia l in all operating conditions. (5) setting of heat use a thermal design that allows for a sufficient margin in light of the power dissipati on (pd) in actual operating conditions. (6) pin shorts and mistake fitting use caution when orienting and positioning the ic for mounting on printed circuit boards. improper mounting may result in damage to the ic. shorts between output pins or between output pins and the power supply and gnd pins caused by the presence of a foreign object may result in damage to the ic. (7) actions in strong magnetic field use caution when using the ic in the pres ence of a strong magnetic field as doi ng so may cause the ic to malfunction. (8) aso when using the ic, set the output transistor so that it does not exceed absolute maximum ratings or aso. (9) thermal shutdown circuit (tsd) this ic incorporates a tsd circuit. if the chip becomes the following temperature, coil output to the motor will be open. the tsd circuit is designed only to shut the ic off to prev ent runaway thermal operation. it is not designed to protect the ic or guarantee its operation. do not cont inue to use the ic after operating this circuit or use the ic in an environment where the operation of the tsd circuit is assumed. tsd on temperature [c] (typ.) hysteresis temperature [c] (typ.) BD6761FS 175 35 bd6762fv 175 23 (10) pwm drive voltage between the output fet drain and source may exceed the absolute maximum ratings due to the fluctuation of vcc at the time of pwm driving. if t here is the threat of this problem, it is recommended to take physical countermeasures for safety such as inserting the capacitor between the vcc pin of fet and the detection resistor pin. (11) testing on application boards when testing the ic on an application board, connecting a capa citor to a pin with low impedance subjects the ic to stress. always discharge capacitors after each process or step. ground the ic during assembly steps as an antistatic measure, and use similar caution when tr ansporting or storing the ic. always turn the ic's power supply off before connecting it to or removing it from a jig or fixture during the inspection process.
BD6761FS,bd6762fv technical note 21/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. (12) regarding input pin of the ic this monolithic ic contains p+ isolation and p substrat e layers between adjacent elements in order to keep them isolated. p/n junctions are formed at the intersection of these p layers with the n layers of other elements to create a variety of parasitic elements. for example, when a resistor and transistor are connected to pins as shown in fig. 14, the p/n junction functions as a parasitic diode when gnd > (pin a) for the resistor or gnd > (pin b) for the transistor (npn). similarly, when gnd > (pin b) for the transistor (npn), the parasitic diode described above combines with the n layer of other adjacent element s to operate as a parasitic npn transistor. the formation of parasitic elements as a result of the relationship s of the potentials of different pins is an inevitable resul t of the ic's architecture. the operation of parasitic elements can cause interference with circuit operation as well as ic malfunction and damage. for these reasons, it is necessary to use caution so that th e ic is not used in a way that will trigger the operation of parasitic elements, such as by th e application of voltages lowe r than the gnd (p substrate) voltage to input pins. (13) ground circuit pattern when using both small signal and large current gnd patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the application's refer ence point so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. be careful not to change the gnd wiring pattern of any external parts, either. fig. 14 mimetic diagram of parasitic element resistor transistor (npn) n n n p + p + p p substrate gnd parasitic element pin a n n p + p + p p substrate gnd parasitic element pin b c b e n gnd pin a p aras iti c element pin b other adjacent elements e b c gnd p aras iti c element
BD6761FS,bd6762fv technical note 22/22 www.rohm.com 2010.06 - rev. a ? 2010 rohm co., ltd. all rights reserved. ordering part number b d 6 7 6 1 f s - e 2 part no. part no. 6761 6762 package fs : ssop-a32 fv : ssop-b40 packaging and forming specification e2: embossed tape and reel ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2000pcs e2 () direction of feed reel 1pin (unit : mm) ssop-a32 1 17 16 32 0.11 0.3min 0.36 0.1 0.8 13.6 0.2 0.15 0.1 5.4 0.2 7.8 0.3 1.8 0.1 (max 13.95 include burr) 0.1 (unit : mm) ssop-b40 0.08 m 0.1 s 0.22 0.1 0.65 0.15 0.1 0.5 0.2 7.8 0.3 5.4 0.2 1.8 0.1 0.1 1 40 20 21 13.6 0.2 (max 13.95 include burr) ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2000pcs e2 () direction of feed reel 1pin
r1010 a www.rohm.com ? 2010 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the products. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redunda ncy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospac e machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

▲Up To Search▲

Price & Availability of BD6761FS

	To Download BD6761FS Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .